ÿWPCL ûÿ2BJ|xÐ ` ÐÐÌÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿH øÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÌÐÐ °°°è ÐÑ Âx„|ü@Ž ÑÐ Å°6Ø'°6Ø'Å Ð4.ÁHÁÓÓÃÃRecommendation G.812ÄÄ Áà"ÁTIMING REQUIREMENTS AT THE OUTPUTS OF SLAVE CLOCKS SUITABLE FORƒ Áà&ÁPLESIOCHRONOUS OPERATION OF INTERNATIONAL DIGITAL LINKSƒ 1.ÁHÁÃÃGeneralÄÄ 1.1ÁHÁÃÃPurpose of this RecommendationÄÄ Ð X ÐÁHÁThe purpose of this Recommendation is to specify requirements for slave clocks, and promote understanding of associated timing requirements for plesiochronous operation of international digital links. ÃÃNoteÄÄ © Administrations may apply this Recommendation, at their own discretion, to slave clocks other than those used in connection with international traffic. Supplement No. 35 gives guidance on one suitable method for the measurement of clock performance with respect to this Recommendation. 1.2ÁHÁÃÃMaximum relative time interval errorÄÄ ÁHÁThe concept of maximum relative time interval error (MRTIE) is useful in specifying slave clock performance. MRTIE is analogous to MTIE as defined in Recommendation G.811 but with reference to a practical high©performance oscillator instead of UTC. 2.ÁHÁÃÃPhase stability of slave clocksÄÄ ÁHÁThe phase stability of a slave clock can be described by its phase variations which in turn can be separated into a number of components: ÁHÁ©Á  Áphase discontinuities due to transient disturbances; ÁHÁ©Âà  Âlong©term phase variations (wander and integrated frequency departure);ÆÆ ÁHÁ©Âà  Âshort©term phase variations (jitter).ÆÆ ÁHÁA phase stability model for slave clocks is described in the Annex to this Recommendation. 2.1ÁHÁÃÃPhase discontinuityÄÄ ÁHÁIn cases of infrequent internal testing or rearrangement operations within the slave clock, the following conditions should be met: ÁHÁ©Âà  Âthe phase variation over any period up to 2ÃÃ11ÄÄ UI should not exceed 1/8 of a UI;ÆÆ ÁHÁ©Âà  Âfor periods greater than 2ÃÃ11ÄÄ UI in the phase variation for each interval or 2ÃÃ11ÄÄ UI should not exceed 1/8 UI up to a total amount of 1 us.ÆÆ ÁHÁWhere the UI corresponds to the reciprocal of the bit rate of the interface. 2.2ÁHÁÃÃLong©term phase variationsÄÄ ÁHÁSlave clock phase stability requirements must account for clock behaviour in real network environments. Impairments such as jitter, error bursts, and outages are intrinsic characteristics of timing distribution facilities. The following specifications are based on the slave clock phase stability model contained in the Annex. This model characterizes actual clock performance, reflecting the stress conditions in real networks under which clocks should perform acceptably. There are three categories of clock operation which require specification: ÁHÁi)Á   Áideal, ÁHÁii)Á   Ástressed, and ÁHÁiii)Á øÁholdover. 2.2.1ÁHÁÃÃIdeal operationÄÄ ÁHÁThis category of operation reflects the performance of a clock under conditions in which there are no impairments on the input timing reference(s). ÁHÁThe MRTIE at the output of the slave clock should not, over any period of S seconds, exceed the following provisional limits: ÁHÁ1)Âh   Â0.05 < S < 100: this region requires further study;ÆÆ ÁHÁ2)Âh   Â1000 ns for S ÃÃ>ÄÄ 100.ÆÆ ÁHÁThe resultant overall specification is summarized in Figure 1/G.81x. 2.2.2ÁHÁÃÃStressed operationÄÄ ÁHÁThis category of operation reflects the actual performance of a clock considering the impact of real operating (stressed) conditions. Stressed conditions include the effects of jitter, protection switching activity, and error bursts. The result of such stressed conditions is timing impairments, as discussed in the annex. ÁHÁThe requirements for stressed operation are under study. Ô ñ,ÔŒ ÁàÀIÁFIGURE 1/G.812ƒ ÁàÀPÁƒ ÁàÀ4ÁÃÃPermissible maximum relative time interval error (MRTIE)Äă ÁàÀ8ÁÃÃdue to long©term phase variations vs. observationÄă ÁàÀ8ÁÃÃperiod S for a slave clock under ideal operationÄă ÃÃNoteÄÄ © For measurement of long©term variations the use of a 10 Hz low©pass filter with a 20 dB/dec roll©off is suggested. 2.2.3ÁHÁÃÃHoldover operationÄÄ ÁHÁThis category of operation reflects the performance of a clock for the infrequent times when a slave clock will lose reference for a significant period of time. ÁHÁThe MRTIE (see item 1.2 and Recommendation G.811) at the output of the slave clock should not, over any period of S seconds, exceed the following provisional limits. ÁHÁ1)Âh   ÂFor S ÃÃ>ÄÄ 100, MRTIE(S) = (aS + 1/2 bSÃÃ2ÄÄ + C) nsÆÆ ÁHÁÁ  Áwhere parameters a, b, c are proposed provisionally as (Note 5): ÁàÀJÁTABLE 1/G.812ƒ ÁàÀ=ÁTransit Clock Local Clockƒ ÁàÀ7ÁÀ ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ Àƒ ÁàÀ7ÁÀ À À À À Àƒ ÁàÀ6ÁaÀ À 0.5 ÃÃ(1)ÄÄ À À 10.0 ÃÃ(3)ÄÄ À Àƒ ÁàÀCÁÀ ÀÀ À À Àƒ ÁàÀ6ÁbÀ À 1.16 x 10Ãé5 (2)ÄÄ À À 2.3 x 10Ãé4 (4)ÄÄ À Àƒ ÁàÀ@ÁÀ À À À À Àƒ ÁàÀ6ÁcÀ À 1000 ÃÃ(6)ÄÄ À À 1000 ÃÃ(6)ÄÄ À Àƒ ÁàÀ7ÁÀ ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ Àƒ ÃÃNote 1ÄÄ © Corresponds to an initial frequency offset of 5 x 10Ãé10ÄÄ ÃÃNote 2ÄÄ © Corresponds to a frequency drift of 1 x 10Ãé9ÄÄ/day. ÃÃNote 3ÄÄ © Corresponds to an initial frequency offset of 1 x 10Ãé8ÄÄ ÃÃNote 4ÄÄ © Corresponds to a frequency drift of 2 x 10Ãé8ÄÄ/day ÃÃNote 5ÄÄ © Temperature effects: the effect of changes in environmental temperature on the performance of a slave clock in holdover mode requires further study. ÃÃNote 6ÄÄ © Takes care of any MRTIE that might have existed at the beginning of holdover operation, and of effects of internal reconfiguration, etc. in the clock (and timing distribution, if applicable). In any case, a smooth transition between "ideal" and "holdover" operations is stipulated. ÁHÁThe resultant overall specification is summarized in Figure 2/G.812. 2.3ÁHÁÃÃShort©term phase variationsÄÄ ÁHÁClock implementations exist which may have some high frequency phase instability components. The maximum permissible short©term phase variation of a slave clock due to jitter is under study. ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀIÁFIGURE 2/G.812ƒ ÁàÀPÁƒ ÁàÀ1ÁÃÃPermissible maximum relative time interval error (MRTIE) due toÄă ÁàÀ.ÁÃÃlong©term phase variations vs. observation period S for a slave clockÄă ÁàÀDÁÃÃunder holdover operationÄă ÁàÀPÁƒ ÁàÀPÁƒ ÁàÀPÁƒ