WPCL 2BJ|x ` H   x|@  6'6' 9.HRecommendation G.739 *CHARACTERISTICS OF AN EXTERNAL ACCESS EQUIPMENT +OPERATING AT 2048 KBIT/S OFFERING SYNCHRONOUS +DIGITAL ACCESS AT 320 KBIT/S AND/OR 64 KBIT/S  X HThis Recommendation gives the characteristics of equipment (external to PCM muldexes) operating at 2048 kbit/s and providing one or several of the following tributaries into/from channel time slots of a 2048kbit/s composite signal:  ( HH© bidirectional synchronous 64 kbit/s access (Figure1a/G.739);  `   8 H unidirectional synchronous 320 kbit/s access (Figure 1b/G.739).  X HThe 320 kbit/s channel is based on the allocation of 5x64kbit/s time slots, e.g., for setting up soundprogramme circuits according to RecommendationsJ.43 and J.44. Because these circuits are specified as unidirectional the equipment for insertion/extraction has to be separated as shown in Figure1b/G.739. 1.HGeneral characteristics 1.1HBit rate HThe nominal bit rate is 2048kbit/s. The tolerance on this rate is +Ġ50 parts per million (ppm). 1.2HTypes of external access  H HHa)h  Bidirectional synchronous insertion/extraction of 64kbit/s data channels (see Figure 1a/G.739).  `   H Note 1 The timing signal for the insertion side should be derived from the 2048kbit/s incoming signal at the insertion side (I0); the timing signal for the extraction side should be derived from the 2048kbit/s incoming signal at the extraction side (E1). Note 2 The provision of a timing signal output, available for the purpose of synchronizing other equipments, is an option that might be required depending upon national synchronization arrangements. Note 3 Further study is required on the possible need for an internal clock. Hb)h  Unidirectional synchronous insertion and extraction of a digital soundprogramme signal into/out of 320kbit/s channel (see Figure1b/G.739). Note The synchronous insertion equipment for 320kbit/s signals requires the internal regeneration of a timing signal synchronized by the 2048 kbit/s input signal I0. This timing signal output of the synchronous insertion equipment is used for synchronizing the sampling frequency of the analogue/digital converter. 2.HFrame structure and use of derived channel time slots 2.1HFrame structure of the 2048 kbit/s signal HRefer to 2.3 of Recommendation G.704. Bit 1 of the frame should be used in accordance with 2.3.3/G.704, i.e., for a CRC check bit procedure. 2.2HUse of derived channel time slots HTime slots not accessed flow transparently through the equipment.   Note Further study is required as to whether the binary content of time slots used at the access points should be replaced, after extraction from the composite signal, by the AIS. 2.2.1H64 kbit/s access HThe number of accessible channel time slots should be at least four and the equipment shall allow access to any of channel time slots 1 to 15 and 17 to 31. Note Equipment exists which provides access to at least four channel time slots in the following order of priority:  H HH6 22 14 30 2 18 10 26 4 20 12 28 8 24 5 21 13 29 1 17 9 25 3 19 11 27 7 23 15 31  `  2.2.2H320 kbit/s access   HThe time slot allocation for digital channels with bit rate at 320kbit/s is given in the following table: h#   h#  320 kbit/s channels (Note 1)  DSP  h# ACCESS  h#  A  B  C  D  E  F  POINTS  h# h#  1 2  6 7  11 12  17 18  22 23  27 28  I3, T, E3  h#  3 4  8 9  13  19  24  29  Figure  h#  5  10  14 15  20 21  25 26  30 31  1b/G.739  h#     Note 1 The six possible 320 kbit/s channels in a 2048 kbit/s stream are numbered A to F. Preferably the channel pairs AB, CD and EF should be used for stereophonic transmission.   Note 2 If the channel time slot 16 which is assigned to signalling as covered in 5 below is not needed for signalling, it may be used for purposes other than a voice channel encoded within the PCM multiplex equipment. 3.XHFrame alignment and CRC procedures both at insertion (I0) and extraction (E1) sides H(An illustration of the procedure is given in Figure2/G.706.) 3.1HLoss of frame alignment HRefer to 4.1.1 of Recommendation G.706. 3.2HRecovery of frame alignment HRefer to 4.1.2 of Recommendation G.706. 3.3HCRC multiframe alignment in TSO HRefer to 4.2 of Recommendation G.706. 3.4HCRC bit monitoring ,Ԍ HRefer to 4.3 of Recommendation G.706. Ha)h  Bidirectional synchronous insertion/extraction of 64 kbit/s data channels Hb)h  Unidirectional synchronous insertion and extraction of digital soundprogramme (DSP) signal into and out of a 320 kbit/s channel HI0,I1:insertion side HE0,E1: extraction side HI2,E2 64 kbit/s interface HI3,E3: synchronous; digital sound programme signal access HT: timing signal JFIGURE 1/G.739 5External access equipment for 64 and 320 kbit/s channelsă 4.HFault conditions and consequent actions 4.1HFault conditions HThe equipment should detect the following conditions: 4.1.1HFailure of power supply. 4.1.2HLoss of incoming signal. Note This detection is not mandatory when contradirectional interfaces are used. 4.1.3HLoss of the incoming signal at 2048 kbit/s both at insertion (I0) and extraction (E1) sides. Note 1 The detection of this fault condition is required only when it does not result in an indication of loss of frame alignment. Note 2 Where separate circuits are used for the digital signal and the timing signal, the loss of either or both should constitute loss of the incoming signal. 4.1.4HLoss of frame alignment both at insertion (I0) and extraction (E1) sides. 4.1.5HExcessive bit error ratio detected by monitoring the frame alignment signal at both the insertion (I0) and extraction (E1) sides. Note The detection of this fault condition at insertion side (I0) depends on the type of application of this equipment in a network and therefore is not mandatory.  x 4.1.5.1 With a random bit error ratio of < 10é4, the probability of activating the indication of fault condition in a few seconds should be less than 10é6. HWith a random bit error ratio of > 10é3, the probability of activating the indication of fault condition in a few seconds should be higher than 0.95. 4.1.5.2 With a random bit error ratio of > 10é3, the probability of deactivating the indication of fault condition in a few seconds should be almost 0. HWith a random bit error ratio of < 10é4, the probability of deactivating the indication of fault condition in a few seconds should be higher than 0.95. Note The activating and deactivating period specified as "as few seconds" is intended to be in the order to 4 to 5 seconds. 4.2HConsequent actions HFurther to the detection of fault condition, appropriate actions should be taken as specified in Table1/G.739. The consequent actions are as follows: 4.2.1HPrompt maintenance alarm indication generated to signify that performance is below acceptable standards and maintenance attention is required locally. When the AIS at the 2048kbit/s inputs (I0, E1) is detected (see general note below to 4.2) the prompt maintenance alarm indication associated with loss of frame alignment (see 4.1.4) and excessive error rate (see 4.1.5), should be inhibited, while the rest of the consequent actions are in accordance with those associated in Table1/G.739 with the two fault conditions. Note The location and provision of any visual and/or audible alarm activated by the alarm indications given in 4.2.1, is left to the discretion of each administration. 4.2.2HAIS applied to I2, I3 outputs (see general note below to 4.2). This action should be taken as soon as possible and not later than 2ms after the detection of the fault condition. 4.2.3HAIS applied to relevant time slots in the composite 2048kbit/s output signal , at insertion side (I1) if supervision of the incoming I2, I3 signal is provided. 4.2.4HInhibition of I2, I3 digital information insertion 4.2.5HBoth 2048 kbit/s signals are bypassed Note The provision of this consequent action depends on the type of application of this equipment in a network and therefore is not mandatory. 4.2.6HAIS applied to the 2048 kbit/s output, extraction side (E0) Note The provision of this consequent action depends on the type of application of this equipment in a network and therefore is not mandatory.  O H&'H&' TABLE 1/G.739 U 1Fault conditions and consequent actions for the external access equipmentă      Fault conditions  Consequent actions (see 4.2)  Both  AIS applied  AIS applied     (see 4.1)  2048 kbit/s  to the  to the      Prompt  AIS applied  Inhibition of  AIS applied  signal are  2048 kbit/s  2048 kbit/s      maintenance  to E2, E3  digital  to the  bypassed (see  output,  output,      alarms  outputs  information  relevant time  Note under  extraction  insertion side      indication   insertion  slot of the  4.2.5)  side (EO)  (I1) (see note      generated   I2 , I3  2048 kbit/s   (see note  under 4.2.7)         composite   under  4.2.6)          signal at            insertion            side (I0)         Failure of power  Yes     Yes  Yes (if  Yes (if     supply       practicable)  practicable)      Loss of incoming  Yes    Yes        signal at I2, I3            inputs (see note            under 4.1.2)             Loss of Extr.s.  Yes  Yes     Yes      incoming (E1)            signal     at 2048 Ins.s.  Yes   Yes     Yes     kbit/s (I0)           ITABLE 1/G.739 (continued)      Fault conditions  Consequent actions (see 4.2)  Both  AIS applied  AIS applied     (see 4.1)  2048 kbit/s  to the  to the      Prompt  AIS applied  Inhibition of  AIS applied  signal are  2048 kbit/s  2048 kbit/s      maintenance  to E2, E3  digital  to the  bypassed (see  output,  output,      alarms  outputs  information  relevant time  Note under  extraction  insertion side      indication   insertion  slot of the  4.2.5)  side (EO)  (I1) (see note      generated   I2 , I3  2048 kbit/s   (see note  under 4.2.7)         composite   under 4.2.6)          signal at            insertion            side (I0)         Loss of Extr.s.  Yes (see  Yes     Yes      frame (E1)   4.2.1)           alignment     (see Ins.s  Yes (see   Yes     Yes     Note 2 of (I0)  4.2.1)           4.2/G.706)             Error Extr.s.  Yes (see  Yes     Yes      ratio (E1)  4.2.1)           1.10é3            on the            frame     alignment Ins.s.  Yes (see   Yes     Yes     signal (I0)  4.2.1)           (see note            under            (4.1.5)              6'6' Note A "Yes" in the table signifies that an action should be taken as a consequence of the relevant fault condition. An open space in the table signifies that the relevant action should not be taken as a consequence of the relevant fault condition, if this condition is the only one present. If more than one fault condition is simultaneously present, the relevant action should be taken if, for at least one of the conditions, a "Yes" is defined in relation to this action. 4.2.7HAIS applied to the 2048 kbit/s output, insertion side (I1) Note The provision of this consequent action depends on the type of this equipment in a network and therefore is not mandatory.   General note to  4.2 The equivalent binary content of the alarm indication signal (AIS) is a continuous stream of binary 1s. HThe strategy for detecting the presence of the AIS should be such that with a high probability the AIS is detectable even in the presence of random errors having a mean error ratio 1.10é3. Nevertheless, a signal in which all the binary elements, with the exception of the frame alignment signal, are in the state1, should not be taken as an AIS. Note All timing requirements quoted apply equally to restoration, subsequent to the fault condition clearing. 5.HInterfaces HThe digital interfaces at 2048 kbit/s should be in accordance with Recommendation G.703. HThe digital interfaces at 64 kbit/s should be either of the codirectional or the contradirectional type specified in RecommendationG.703. HThe need to define a digital interface operating at 320kbit/s is under study. Note 1 It should be noted that according to the principle of minimizing the number of different types of interfaces, the information rate of 320 kbit/s will be offered to customers at the user/network interface level using the 2048kbit/s interface as defined in Recommendations I.431 and G.703. ,Ԍ  h Note 2 In the case of the 64 kbit/s codirectional interface, the design of the input ports should take into account the need to provide octet alignment, to allow controlled slips when the tributary timing and that of the multiplexer timing source are plesiochronous, and to absorb jitter and wander up to the limits given in Recommendation G.823. 6.HJitter 6.1HJitter at 2048 kbit/s output HWhen there is no jitter on the 2048 kbit/s inputs (I0, E1) the peakto peak jitter at the 2048kbit/s outputs (I1, E0) should not exceed 0.10UI when it is measured within the frequency range from f1Ġ=20Hz to f4Ġ=100kHz. The equivalent binary content of the test signal applied at the 2048kbit/s input shall be a pseudorandom bit sequence of length 215ĩ1 as specified in Recommendation0.151. See Figure2/G.823. Note It may be necessary to include a frame alignment signal in the test signal to enable the measurement to be carried out. 6.2HJitter at E2, E3 outputs HThe jitter at the E2 (64 kbit/s) output when there is no jitter at the 2048kbit/s input (E1) should not exceed 0.025UI when measured within the frequency range from f1Ġ=20Hz to f4Ġ=100kHz. The equivalent binary content of the test signal applied at the 2048kbit/s input shall be a pseudorandom bit sequence of length 215ĩ1 as specified in Recommendation 0.151. Note In order to carry out this measurement without invoking AIS at the 64kbit/s output it will normally be necessary to include a frame alignment signal in the test signal. 6.2.2HSince the physical and electrical characteristics of a 320kbit/s interface are identical to those of the 2048kbit/s interface, the jitter at the E3 (synchronous 320kbit/s) output when there is no jitter at the 2048kbit/s input (E1) is according to 6.1 above. 6.3HJitter transfer functions 6.3.1HThe jitter transfer function between the 2048kbit/s input (I0, E1) and the output (I1, E0) should not exceed the gain/frequency limits given in Figure2/G.739. HSome administrations require that equipment is fitted with jitter reducers. In this case, the jitter transfer function should not exceed the gain/frequency limits given in Figure3/G.739. Note 1 The 2048 kHz signal shall be modulated with sinusoidal jitter. The equivalent binary content of the test signal shall be 1000. Note 2 It may be necessary to include a frame alignment signal in the test signal to enable the measurement to be carried out. 6.3.2HThe jitter transfer function between the 2048kbit/s input (E1) and the E2 (64 kbit/s) output should not exceed 29.6 dB when measured over the frequency range f0 to 10 kHz. The frequency f0 should be less than 20Hz and as low as possible (e.g., 10Hz), taking into account the limitations of measuring equipment. Note 1 The 2048kbit/s test signal shall be modulated by sinusoidal jitter. The equivalent binary content of the test signal shall be 1000. Note 2 In order to carry out this measurement without invoking AIS at the 64kbit/s output it will normally be necessary to include a frame alignment signal in the test signal. Note 3 The jitter reduction of 1/32 due to demultiplexing is equivalent to 30.1dB. 6.3.3HSince the physical and electrical characteristics of a 320kbit/s interface are identical to those of the 2048kbit/s interface, the jitter transfer function between the 2048kbit/s input (E1) and E3 (synchronous 320kbit/s) output is according to 6.3.1 above. Note 1 The frequency f0 should be less than 20Hz and as low as possible (e.g., 10Hz), taking into account the limitations of measuring equipment. Note 2 To achieve accurate measurements, the use of a selective method is recommended with a bandwidth sufficiently small referred to the relevant measurement frequency but not wider than 40Hz. Note 3 For interfaces within national boundaries, this characteristic may be used. 8KFIGURE 2/G.739  ,Ԍ Note 1 The frequency f0 should be less than 20 Hz and as low as possible (e.g., 10Hz), taking into account the limitations of measuring equipment. Note 2 To achieve accurate measurement, the use of a selective method is recommended with a bandwidth sufficiently small referred to the relevant measurement frequency but not wider than 40Hz. 8KFIGURE 3/G.739 Section 7.6 Principal characteristics of transcoder and digital circuit multiplication equipment.