ÿWPCL ûÿ2BJ|xÐ ` ÐÐÌÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿH øÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÌÐÐ °°°è ÐÑ Âx„|ü@Ž ÑÐ Å°6Ø'°6Ø'Å Ð ÕYÏ Ð ` Ð Áà@Á©  ©ƒ Áà<ÁAP IX©142©Eƒ ÁàAÁƒYÕÕYÏ Ð ` Ð Áà@Á©  ©ƒ Áà<ÁAP IX©142©Eƒ ÁàAÁƒYÕÐ °èè Ð2.ÁHÁÓÓÃÃRecommendation G.703ÄÄ ÁHÁÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ Ð h ÐÃÃNote 1ÄÄ © The characteristics of interfaces at non©hierarchical bit rates, except n x 64 kbit/s interfaces conveyed by 1544 kbit/s or 2048 kbit/s interfaces, are specified in the respective equipment Recommendations. ÃÃNote 2ÄÄ © The jitter specifications contained in the following ÀÀÀÀ 6, 7, 8 and 9 are intended to be imposed at international interconnection points. ÃÃNote 3ÄÄ © The interfaces described in ÀÀÀÀ 2 to 9 of this Recommendation correspond to the ports T (output port) and T' (input port) as recommended for interconnection in CCIR Recommendation AC/9 with reference to Report AH/9 of CCIR Study Group 9. (This Report defines the points T and T'.) ÃÃNote 4ÄÄ © For signals with bit rates of n x 64 kbit/s (n = 2 to 31) which are routed through multiplexing equipment specified for the 2048 kbit/s hierarchy, the interface shall have the same electrical physical characteristics as those for the 2048 kbit/s interface specified in section 6/G.703. For signals with bit rates of n x 64 kbit/s (n = 2 to 23) which are routed through multiplexing equipment specified for the 1544 kbit/s hierarchy, the interface shall have the same electrical physical characteristics as those for the 1544 kbit/s interface specified in section 2/G.703. 1.1.2ÁHÁIn both directions of transmission, three signals can be carried across the interface: ÁHÁ©Á  Á64 kbit/s information signal; ÁHÁ©Á  Á64 kHz timing signal; ÁHÁ©Á  Á8 kHz timing signal. ÃÃNote 1ÄÄ © The 64 kbit/s information signal and the 64 kHz timing signal are mandatory. However, although an 8 kHz timing must be generated by the controlling equipment (e.g., PCM multiplex or time slot access equipment), it should not be mandatory for the subordinate equipment on the other side of the interface to either utilize the 8 kHz timing signal from the controlling equipment or to supply an 8 kHz timing signal. ÃÃNote 2ÄÄ © The detection of an upstream fault can be transmitted across the 64 kbit/s interface by transmitting an Alarm Indication Signal towards the subordinate equipment. 1.1.3ÁHÁThe interface should be bit sequence independent at 64 kbit/s. 1.1.4.2Á  ÁÃÃCentralized clock interfaceÄÄ ÁHÁThe term centralized clock is used to describe an interface wherein for both directions of transmission of the information signal, the associated timing signals are supplied from a centralized clock, which may be derived for example from certain incoming line signals (see Figure 2/G.703). 1.1.4.3Á  ÁÃÃContradirectional interfaceÄÄ ÁHÁThe term contradirectional is used to describe an interface across which the timing signals associated with both directions of transmission are directed towards the subordinate equipment (See Figure 3/G.703). 1.2.1.1.6 Overvoltage protection requirement: See Annex B. ÁHÁThe return loss at the input ports should have the following minimum values: À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À À À Frequency Range À À Return Loss À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À À 4 kHz to 13 kHz À À 12 dB À À À À 13 kHz to 256 kHz À À 18 dB À À À À 256 kHz to 384 kHz À À 14 dB À À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À ÁHÁTo provide nominal immunity against interference, input ports are required to meet the following requirements: ÁHÁA nominal aggregate signal, encoded as a 64 kbit/s co©directional signal, and having a pulse shape as defined in the pulse mask shall have added to it interfering signal with the same pulse shape as the wanted signal. The interfering signal should have a bit rate within the limits specified in this Recommendation but should not be synchronous with the wanted signal. The interfering signal shall be combined with the wanted signal in a combining network, with an overall zero loss in the signal path and with the nominal impedance 120 ohms to give a signal to interference ratio of 20 dB. The binary content of the interfering signal should comply with Recommendation 0.152 (2ÃÃ11ÄÄ©1 bit period). No errors shall result when the combined signal, attenuated by up to the maximum specified interconnecting cable loss, is applied to the input port. ÃÃNoteÄÄ © If the symmetrical pair is screened, the screen shall be connected to the earth at the output port, and provision shall be made for connecting the screen of the symmetrical pair to earth, if required, at the input port. 1.2.3.1.6 Specifications at the input ports ÁHÁThe digital signals presented at the input ports should be as defined above but modified by the characteristics of the interconnecting pairs. The attenuation of these pairs at a frequency of 32 kHz should be in the range 0 to 3 dB. This attenuation should take into account any losses incurred by the presence of a digital distribution frame between the equipments. ÁHÁThe return loss at the input ports should have the following minimum values: À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À À À Frequency range À À À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ Return loss À À À À Data signal À À Composite timing signal À À À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À À 1.6 kHz to 3.2 kHz À À 3.2 kHz to 6.4 kHz À À 12 dB À À À À 3.2 kHz to 64 kHz À À 6.4 kHz to 128 kHz À À 18 dB À À À À 64 kHz to 96 kHz À À 128 kHz to 192 kHz À À 14 dB À À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À ÁHÁTo provide nominal immunity against interference, input ports are required to meet the following requirement: ÁHÁA nominal aggregate signal, encoded as a 64 kbit/s contra©directional signal, and having a pulse shape as defined in the pulse mask shall have added to it an interfering signal with the same pulse shape as the wanted signal. The interfering signal should have a bit rate within the limits specified in this Recommendation but should not be synchronous with the wanted signal. The interfering signal shall be combined with the wanted signal in a combining network with an overall zero loss in the signal path and with the nominal impedance 120 ohms to give a signal to interference ratio of 20 dB. The binary content of the interfering signal should comply with Recommendation 0.152 (2ÃÃ11ÄÄ©1 bit period). No errors shall result when the combined signal, attenuated by up to the maximum specified interconnecting cable loss, is applied to the input port. ÃÃNote 1ÄÄ © The return loss specification for both the data signal and the composite timing signal input ports. ÃÃNote 2ÄÄ © If the symmetrical pairs are screened, the screens shall be connected to the earth at the output port, and provision shall be made for connecting the screens of the symmetrical pairs to earth, if required, at the input port. 1.2.3.1.7 Overvoltage protection requirement: See Annex B. 2ÁHÁÃÃInterface at 1544 kbit/sÄÄ 2.1ÁHÁInterconnection of 1554 kbit/s signals for transmission purposes is accomplished at a digital distribution frame. 2.2ÁHÁThe signal shall have a bit rate of 1544 kbit/s ÀÀ 50 parts per million (ppm). 2.3ÁHÁOne symmetrical pair shall be used for each direction of transmission. 2.4ÁHÁTest load impedance shall be 100 ohms, resistive. 2.5ÁHÁAn AMI (bipolar) code or B8ZS code shall be used. Connecting line systems require suitable signal content to guarantee adequate timing information. This can be accomplished either by use of B8ZS code, scrambling or by permitting not more than 15 spaces between successive marks and having an average mark density of at least 1 in 8. 2.6ÁHÁThe shape for an isolated pulse measured at the distribution frame shall fall within the mask in Figure 10/G.703 and meet the other requirements of Table 4/G.703. For pulse shapes within the mask, the peak undershoot should not exceed 40% of the peak pulse (mark). 2.7ÁHÁThe voltage within a time slot containing a zero (space) shall be no greater than either the value produced in that time slot by other pulses (marks) within the mask of Figure 10/G.703 or ÀÀ 0.1 of the peak pulse (mark) amplitude, whichever is greater in magnitude. a) The pulse mark for first order digital interface is shown in    Figure 10/G.703. b) See ÀÀ 2.5 in the text. c) See Annex A. d) The signal level is the power level measured in a 3 kHz bandwidth at the    point where the signal arrives at the distribution frame for an all 1s    pattern transmitted. 3ÁHÁÃÃInterface at 6312 kbit/sÄÄÔ ., ÔŒ 3.1ÁHÁInterconnection of 6312 kbit/s signals for transmission purposes is accomplished at a digital distribution frame. 3.2ÁHÁThe signal shall have a bit rate of 6312 kbit/s ÀÀ 30 ppm. 3.3ÁHÁOne symmetrical pair of characteristic impedance of 110 ohms, or one coaxial pair of characteristic impedance of 75 ohms shall be used for each direction of transmission. 3.4ÁHÁTest load impedance shall be 110 ohms resistive or 75 ohms resistive as appropriate. 3.5ÁHÁA pseudo©ternary code shall be used as indicated in Table 5/G.703. 3.6ÁHÁThe shape for an isolated pulse measured at the distribution frame shall fall within the mask either of Figure 11/G.703 or of Figure 12/G.703 and meet the other requirements of Table 5/G.703. 3.7ÁHÁThe voltage within a time slot containing a zero (space) shall be no greater than either the value produced in that time slot by other pulses (marks) within the mask of Figure 11/G.703, or ÀÀ 0.1 of the peak pulse (mark) amplitude, whichever is greater in magnitude. a) The pulse mask for second order digital interface is shown in    Figures 11/G.103 and 12/G.703. b) See Annex A. c) See Annex A. 4ÁHÁÃÃInterface at 32 064 kbit/sÄÄ 4.1ÁHÁInterconnection of 32 064 kbit/s for signals for transmission purposes is accomplished at a digital distribution frame. 4.2ÁHÁThe signal shall have a bit rate of 32 064 kbit/s ÀÀ 10 ppm. 4.3ÁHÁOne coaxial pair shall be used for each direction of transmission. 4.4ÁHÁThe test load impedance shall be 75 ohms ÀÀ 5% resistive and the test method shall be direct. 4.5ÁHÁA scrambled AMI code shall be used. 4.6ÁHÁThe shape for an isolated pulse measured at the point where the signal arrives at the distribution frame shall fall within the mask in the Figure 13/G.703. 4.7ÁHÁThe voltage within a time slot containing a zero (space) shall be no greater than either the value produced in that time slot by other pulses (marks) within the mask of Figure 13/G.703 or ÀÀ 0.1 of the peak pulse (mark) amplitude, whichever is greater in magnitude. 4.8ÁHÁFor an all 1s pattern transmitted, the power measured in a 3 kHz bandwidth at the point where the signal arrives at the distribution frame shall be as follows: ÁHÁ16 032 kHz: +5 dBm to + 12dBm ÁHÁ32 064 kHz: at least 20 dB below the power at 16 032 kHz. 4.9ÁHÁThe connectors and coaxial cable pairs in the distribution frame shall be 75 ohms ÀÀ 5 %. 5ÁHÁÃÃInterface at 44 736 kbit/sÄÄ 5.1ÁHÁInterconnection of 44 736 kbit/s signals for transmission purposes is accomplished at a digital distribution frame. 5.2ÁHÁThe signal shall have a bit rate of 44 736 kbit/s ÀÀ 20 ppm. ÁHÁThe signal shall have a frame structure consistent with Recommendation G.752. Specifically, it shall contain the frame alignment bits FÃÃ0ÄÄ, FÃÃ11ÄÄ, FÃÃ12ÄÄ and the multi©frame alignment bits MÃÃ1ÄÄ to MÃÃ7ÄÄ, as defined in Table 2/G.752. 5.3ÁHÁOne coaxial pair shall be used for each direction of transmission. 5.4ÁHÁTest load impedance shall be 75 ohms ÀÀ 5% resistive, and the test method shall be direct. 5.5ÁHÁThe B3ZS code shall be used. This code is defined in Annex A. 5.6ÁHÁThe transmitted pulses have a nominal 50% duty cycle. ÁHÁThe shape for an isolated pulse measured at the point where the signal arrives at the distribution frame shall fall within the mask in Figure 14/G703. 5.7ÁHÁThe voltage within a time slot containing a zero (space shall be no greater than either the value produced in that time slot by other pulses (marks) within the mask of Figure 14/G.703, or ÀÀ 0.05 of the peak pulse (mark) amplitude, whichever is greater in magnitude. 5.8ÁHÁFor an all 1s pattern transmitted, the power measured in a 3 kHz bandwidth at the point where the signal arrives at the distribution frame shall be as follows: ÁHÁ22 368 kHz: ©1.8 to +5.7 dBm ÁHÁ44 736 kHz: at least 20 dB below the power at 22 368 kHz. 5.9ÁHÁThe digital distribution frame for 44 736 kbit/s signals shall have the characteristics specified in ÀÀÀÀ 5.9.1 and 5.9.2 below. 5.9.1ÁHÁThe loss between the points where the signal arrives and leaves at the distribution frame shall be as follows: Ð Ð ÐÂHHÂ0.60 ÀÀ 0.55 dB at 22 368 kHz (comprised of any combination of flat and shaped losses).ÆÆ Ð ` Ð Ð Ð Ð5.9.2ÁHÁThe connectors and coaxial pair cables in the distribution frame shall be 75 ohms ÀÀ 5%. ÁHÁOvervoltage protection requirement: See Annex B. 6.3.1ÁHÁThe digital signal presented at the input port shall be defined above but modified by the characteristic of the iÃÃnÄÄterconnecting pair. The attenuation of this pair shall be assumed to follow a ÀÀf law and the loss at a frequency of 1 024 kHz shall be in the range of 0 to 6 dB. This attenuation should take into account any losses incurred by the presence of a digital distribution frame between the equipments. 6.3.2ÁHÁFor the jitter to be tolerated at the input port refer to ÀÀ 3 of Recommendation G.823. 6.3.3ÁHÁThe return loss at the input port should have the following minimum values. À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À À À Frequency range À À Return loss À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À À 51 kHz to 102 kHz À À 12 dB À À À À 102 kHz to 2 048 kHz À À 18 dB À À À À 2 048 kHz to 3 072 kHz À À 14 dB À À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À 6.3.4 To ensure adequate immunity against signal reflections that can arise at the interface due to impedance irregularities at digital distribution frames and at digital output ports, input ports are required to meet the following requirement: ÁHÁA nominal aggregate signal, encoded into HDB3 and having a pulse shape as defined in the pulse mask shall have added to it an interfering signal with the same pulse shape as the wanted signal. The interfering signal should have a bit rate within the limits specified in this Recommendation but should not be synchronous with the wanted signal. The interfering signal shall be combined with the wanted signal in a combining network, with an overall zero loss in the signal path and with the nominal impedance 75 À2À (in the case of coaxial©pair interface) or 120 À2À (in the case of symmetrical©pair interface), to give a signal to interference ratio of 18 dB. The binary content of the interfering signal should comply with Recommendation 0.151 (2ÃÃ15ÄÄ©1 bit period). No errors shall result when the combined signal, attenuated by up to the maximum specified interconnecting cable loss, is applied to the input port. ÃÃNoteÄÄ © A receiver implementation providing an adaptive rather than a fixed threshold is considered to be more robust against reflections and should therefore be preferred. 7.3.1ÁHÁThe digital signal presented at the input port shall be as defined above but modified by the characteristic of the intercoÃÃnÄÄnecting pair. The attenuation of this pair shall be assumed to follow a ÀÀf law and the loss at a frequency of 4 224 kHz shall be in the range 0 to 6 dB. This attenuation should take into account any losses incurred by the presence of a digital distribution frame between the equipments. 7.3.2ÁHÁFor the jitter to be tolerated at the input port refer to ÀÀ 3 of Recommendation G.823. 7.3.3ÁHÁThe return loss at the input port should have the following minimum values. À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À À À Frequency range À À Return loss À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À À 211 kHz to 422 kHz À À 12 dB À À À À 422 kHz to 8 448 kHz À À 18 dB À À À À 8 448 kHz to 12 762 kHz À À 13 dB À À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À 7.3.4ÁHÁTo ensure adequate immunity against signal reflections that can arise at the interface due to impedance irregularities at digital distribution frames and at digital output ports, input ports are required to meet the following requirement: ÁHÁA nominal aggregate signal, encoded into HDB3 and having a pulse shape as defined in the pulse mask shall have added to it an interfering signal with the same pulse shape as the wanted signal. The interfering signal should have a bit rate within the limits specified in this Recommendation but should not be synchronous with the wanted signal. The interfering signal shall be combined with the wanted signal in a combining network, with an overall zero loss in the signal path and with the nominal impedance 75 À2À to give a signal to interference ratio of 20 dB. The binary content of the interfering signal should comply with Recommendation 0.151 (2ÃÃ15ÄÄ©1 bit period). No errors shall result when the combined signal, attenuated by up to the maximum specified interconnecting cable loss, is applied to the input port. 8ÁHÁÃÃInterface at 34 368 kbit/sÄÄ 8.1ÁHÁÃÃGeneral characteristicsÄÄ ÁHÁBit rate: 34 368 kbit/s ÀÀ 20 ppm ÁHÁCode: HDB3 (a description of this code can be found in Annex A) ÁHÁOvervoltage protection requirement: See Annex B. 8.2ÁHÁÃÃSpecification at the output ports (see Table 8/G.703)ÄÄ 8.3ÁHÁÃÃSpecifications at the input portsÄÄ 8.3.1ÁHÁThe digital signal presented at the input port shall be as defined above but modified by the characteristics of the interconnecting pair.Ãà ÄÄThe attenuation of this cable shall be assumed to follow approximately a ÀÀf law and the loss at a frequency of 17 184 kHz shall be in the range 0 to 12 dB. 8.3.2ÁHÁFor the jitter to be tolerated at the input port refer to ÀÀ 3 of Recommendation G.823. 8.3.3ÁHÁThe return loss at the input port should have the following minimum values. À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À À À Frequency range À À Return loss À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À À 860 kHz to 1 720 kHz À À 12 dB À À À À 1 720 kHz to 34 368 kHz À À 18 dB À À À À 34 368 kHz to 51 550 kHz À À 14 dB À À À ÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀÀ À 8.3.4Á0 ÁTo ensure adequate immunity against signal reflections that can arise at the interface due to impedance irregularities at digital distribution frames and at digital output ports, input ports are required to meet the following requirement: ÁHÁA nominal aggregate signal, encoded into HDB3 and having a pulse shape as defined in the pulse mask shall have added to it an interfering signal with the same pulse shape as the wanted signal. The interfering signal should have a bit rate within limits specified in this Recommendation but should not be synchronous with the wanted signal. The interfering signal shall be combined with the wanted signal in a combining network, with an overall zero loss in the signal path and with the nominal impedance 75 À2À to give a signal to interference ratio of 20 dB. The binary content of the interfering signal should comply with Recommendation 0.151 (2ÃÃ23ÄÄ©1 bit period). No errors shall result when the combined signal, attenuated by up to the maximum specified interconnecting cable loss, is applied to the input port. 8.4ÁHÁÃÃEarthing of outer conductor or screenÄÄ ÁHÁThe outer conductor of the coaxial pair shall be connected to the earth at the output port, and provision shall be made for connecting this conductor to earth, if required, at the input port. 9ÁHÁÃÃInterface at 139 264 kbit/sÄÄ 9.1ÁHÁÃÃGeneral characteristicsÄÄ ÁHÁBit rate: 139 264 kbit/s ÀÀ 15 ppm. ÁHÁCode: coded mark inversion (CMI). ÁHÁOvervoltage protection requirement: See Annex B. 9.2ÂàHÂÃÃSpecifications at the output ports (see Table 9/G.703 and Figures 19ÄÄ ÃÃand 20/G.703)ÄÄÆÆ ÃÃNote 1ÄÄ © A method based on the measurement of the levels of the fundamental frequency component, the second (and possibly the third) harmonic of a signal corresponding to binary all 0s and binary all 1s, is considered to be a perfectly adequate method of checking that the requirements of Table 9/G.703 have been met. ÁHÁThe relevant values are under study. 9.3ÁHÁÃÃSpecifications at the input portsÄÄ ÁHÁThe digital signal presented at the input port should conform to Table 9/G.703 and Figures 19 and 20/G.703 modified by the characteristics of the interconnecting coaxial pair. ÁHÁThe ÃÃaÄÄttenuation of the coaxial pair should be assumed to follow an approximate ÀÀf law and to have a maximum insertion loss of 12 dB at a frequency of 70 MHz. ÁHÁFor the jitter to be tolerated at the input port refer to ÀÀ 3 of Recommendation G.823. ÁHÁThe return loss characteristics should be the same as that specified for the output port. ÃÃNotes to Figure 19/G.703ÄÄ ÃÃNote 1ÄÄ © V = 1.0 volt. ÃÃNote 2ÄÄ © For all measurements using these masks, the signal should be AC coupled, using a capacitor of not less than 0.01 uF, to the input of the oscilloscope used for measurements. ÁHÁThe nominal zero level for both masks should be aligned with the oscilloscope trace with no input signal. With the signal then applied, the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any such adjustment should be the same for both masks and should not exceed ÃÃ+ÄÄ0.05 V. This may be checked by removing the input signal again and verifying that the trace lies within ÃÃ+ÄÄ0.05 V of the nominal zero level of the masks. ÃÃNote 3ÄÄ © Each pulse in a coded pulse sequence should meet the limits of the relevant mask, irrespective of the state of the preceding and succeeding pulses. For actual verification, if a 139 264 kHz timing signal associated with the source of the interface signal is available, its use as a timing reference for an oscilloscope is preferred. Otherwise, compliance with the relevant mask may be tested by means of all©0s and all©1s signals, respectively. (In practice, the signal may contain frame alignment bits per G.751.) ÃÃNote 4ÄÄ © The maximum "steady state" amplitude should not exceed the 0.55 V limit. Overshoots and other transients are permitted to fall into the dotted area, bounded by the amplitude levels 0.55 V and 0.6 V, provided that they do not exceed the steady state level by more than 0.05 V. The possibility of relaxing the amount by which the overshoot may exceed the steady state level is under study. ÃÃNote 5ÄÄ © For the purpose of these masks, the rise time and decay time should be measured between ©0.4 V and 0.4 V, and should not exceed 2 ns. ÁàHHÁFIGURE 20/G.703ƒ ÁàHOÁƒ ÁàH:ÁÃÃMask of a pulse corresponding to a binary 1Äă ÃÃNotes to Figure 20/G.703ÄÄ ÃÃNote 1ÄÄ © V = 1.0 volt. ÃÃNote 2ÄÄ © For all measurements using these masks, the signal should be AC coupled, using a capacitor of not less than 0.01 uF, to the input of the oscilloscope used for measurements. ÁHÁThe nominal zero level for both masks should be aligned with the oscilloscope trace with no input signal. With the signal then applied, the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any such adjustment should be the same for both masks and should not exceed to ÃÃ+ÄÄ0.05 V. This may be checked by removing the input signal again and verifying that the trace lies within ÃÃ+ÄÄ0.05 V of the nominal zero level of the masks. ÃÃNote 3ÄÄ © Each pulse in a coded pulse sequence should meet the limits of the relevant mask, irrespective of the state of the preceding and succeeding pulses. For actual verification, if a 139 264 kHz timing signal associated with the source of the interface signal is available, its use as a timing reference for an oscilloscope is preferred. Otherwise, compliance with the relevant mask may be tested by means of all©0s and all©1s signals, respectively. (In practice, the signal may contain frame alignment bits per G.751.) ÃÃNote 4ÄÄ © The maximum "steady state" amplitude should not exceed the 0.55 V limit. Overshoots and other transients are permitted to fall into the dotted area, bounded by the amplitude levels 0.55 V and 0.6 V, provided that they do not exceed the steady state level by more than 0.05 V. The possibility of relaxing the amount by which the overshoot may exceed the steady state level is under study. ÃÃNote 5ÄÄ © For the purpose of these masks, the rise time and decay time should be measured between ©0.4 V and 0.4 V, and should not exceed 2 ns. ÃÃNote 6ÄÄ © The inverse pulse will have the same characteristics, noting that the timing tolerance at the zero level of the negative and positive transitions are ÃÃ+ÄÄ0.1 ns and ÃÃ+ÄÄ0.5 ns respectively. ÁàHLÁAnnex Aƒ ÁàHOÁƒ ÁàHCÁ(to Recommendation G.703)ƒ ÁàHOÁƒ ÁàHFÁÃÃDefinition of codesÄă ÁHÁThis annex defines the Modified Alternate Mark Inversion Codes (cf. Recommendation G.701, item 9005) whose use is specified in Recommendation G.703. ÁHÁIn these codes, binary 1 bits are generally represented by alternate positive and negative pulses, and binary 0 bits by spaces. Exceptions, as specified for the individual codes, are made when strings of successive 0 bits occur in the binary signal. ÁHÁIn the definitions below, B represents an inserted pulse conforming to the AMI rule (G.701, 9004), and V represents an AMI violation (9007). ÁHÁThe encoding of binary signals in accordance with the rules given in this annex includes frame alignment bits, etc. ÃÃDefinition of B3ZS (also designated HDB2) and HDB3ÄÄ ÁHÁEach block of 3 (resp. 4) successive zeros is replaced by OOV (OOOV) or BOV (BOOV). The choice of OOV (resp. OOOV) or BOV (resp. BOOV) is made so that the number of B pulses between consecutive V pulses is odd. In other words, successive V pulses are of alternate polarity so that no d.c. component is introduced. ÃÃNoteÄÄ © The abbreviations stand for the following: ÁHÁHDB2 (HDB3) high density bipolar of order 2 (3) ÁHÁB3ZS bipolar with three©zero substitution ÃÃDefinition of B6ZS and B8ZSÄÄ ÁHÁEach block of 6 (resp. 8) successive zeros is replaced by OVBOVB (resp. OOOVBOVB). Õ3IE:\CCITT\AP©IX\DOC\142E1.TXS 3ÕÕ3IE:\CCITT\AP©IX\DOC\142E1.TXS 3ÕÁàHLÁAnnex Bƒ ÁàHOÁƒ ÁàHCÁ(to Recommendation G.703)ƒ ÁàHOÁƒ ÁàH4ÁÃÃSpecification of the overvoltage protection requirementÄă ÁHÁThe input and output ports should withstand without damage the following test: ÁHÁ©Âà  Â10 standard lightning impulses (1.2/50ÀÀs) with a maximum amplitude of UVÃÃDCÄÄ (5 negative and 5 positive impulses). For the definition of this impulse see Recommendation K.17 Reference 1 (IEC 60©2/1973);ÆÆ ÁHÁ©Á  Áat the interface for coaxial pairs; ÁHÁÁ  Á© differential mode: with a pulse generator of Figure 1, the                  value of U is under study; ÁHÁÁ  Á© common mode © under study; ÁHÁ©Á  Áat the interface for symmetrical pairs: ÁHÁÁ  Á© differential mode: with a pulse generator of Figure 1, the                  value of U is under study (a value of 20 V has been mentioned); ÁHÁÁ  Á© common mode: with a pulse generator of Figure 2, U = 100 VÃÃDCÄÄ; ÁHÁ©Á  Ápossible pulse generators are described in Figures 1 and 2.